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  <body><table style="margin: 0 auto;"><tr><td><div class="topbar"><a href="AArch32-regindex.html">AArch32 Registers</a></div></td><td><div class="topbar"><a href="AArch64-regindex.html">AArch64 Registers</a></div></td><td><div class="topbar"><a href="AArch32-sysindex.html">AArch32 Instructions</a></div></td><td><div class="topbar"><a href="AArch64-sysindex.html">AArch64 Instructions</a></div></td><td><div class="topbar"><a href="enc_index.html">Index by Encoding</a></div></td><td><div class="topbar"><a href="ext_alpha_index.html">External Registers</a></div></td><td><div class="topbar"><a href="ext_enc_index.html">External Registers by Offset</a></div></td><td><div class="topbar"><a href="func_index.html">Registers by Functional Group</a></div></td><td><div class="topbar"><a href="notice.html">Proprietary Notice</a></div></td></tr></table><hr/><h1 class="register-section">TRCEVENTCTL0R, Event Control 0 Register</h1><p>The TRCEVENTCTL0R characteristics are:</p><h2>Purpose</h2>
        <p>Controls the generation of ETEEvents.</p>
      <h2>Configuration</h2><p>External register TRCEVENTCTL0R bits [31:0] are architecturally mapped to AArch64 System register <a href="AArch64-trceventctl0r.html">TRCEVENTCTL0R[31:0]</a>.</p><p>This register is present only when FEAT_ETE is implemented, FEAT_TRC_EXT is implemented and TRCIDR4.NUMRSPAIR != 0b0000. Otherwise, direct accesses to TRCEVENTCTL0R are <span class="arm-defined-word">RES0</span>.</p><h2>Attributes</h2>
        <p>TRCEVENTCTL0R is a 32-bit register.</p>
      <h2>Field descriptions</h2><table class="regdiagram"><thead><tr><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td><td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td></tr></thead><tbody><tr class="firstrow"><td class="lr" colspan="1"><a href="#fieldset_0-31_31-1">EVENT3_TYPE</a></td><td class="lr" colspan="2"><a href="#fieldset_0-30_29">RES0</a></td><td class="lr" colspan="5"><a href="#fieldset_0-28_24-1">EVENT3_SEL</a></td><td class="lr" colspan="1"><a href="#fieldset_0-23_23-1">EVENT2_TYPE</a></td><td class="lr" colspan="2"><a href="#fieldset_0-22_21">RES0</a></td><td class="lr" colspan="5"><a href="#fieldset_0-20_16-1">EVENT2_SEL</a></td><td class="lr" colspan="1"><a href="#fieldset_0-15_15-1">EVENT1_TYPE</a></td><td class="lr" colspan="2"><a href="#fieldset_0-14_13">RES0</a></td><td class="lr" colspan="5"><a href="#fieldset_0-12_8-1">EVENT1_SEL</a></td><td class="lr" colspan="1"><a href="#fieldset_0-7_7-1">EVENT0_TYPE</a></td><td class="lr" colspan="2"><a href="#fieldset_0-6_5">RES0</a></td><td class="lr" colspan="5"><a href="#fieldset_0-4_0-1">EVENT0_SEL</a></td></tr></tbody></table><h4 id="fieldset_0-31_31-1">EVENT3_TYPE, bit [31]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000 and UInt(TRCIDR0.NUMEVENT) &gt;= 3:
                        </span></h4><div class="field">
      <p>Chooses the type of Resource Selector.</p>
    <table class="valuetable"><tr><th>EVENT3_TYPE</th><th>Meaning</th></tr><tr><td class="bitfield">0b0</td><td><p>A single Resource Selector.</p>
<p>TRCEVENTCTL0R.EVENT3.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event.</p></td></tr><tr><td class="bitfield">0b1</td><td><p>A Boolean-combined pair of Resource Selectors.</p>
<p>TRCEVENTCTL0R.EVENT3.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT3.SEL[4] is <span class="arm-defined-word">RES0</span>.</p></td></tr></table><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-31_31-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-30_29">Bits [30:29]</h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-28_24-1">EVENT3_SEL, bits [28:24]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000 and UInt(TRCIDR0.NUMEVENT) &gt;= 3:
                        </span></h4><div class="field">
      <p>Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT3.TYPE controls whether TRCEVENTCTL0R.EVENT3.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.</p>
    <p>If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>Selecting Resource Selector pair 0 using this field is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>When any of the selected resource events occurs and <a href="ext-trceventctl1r.html">TRCEVENTCTL1R</a>.INSTEN[3] == 1, then Event element 3 is generated in the instruction trace element stream.</p><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-28_24-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-23_23-1">EVENT2_TYPE, bit [23]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000 and UInt(TRCIDR0.NUMEVENT) &gt;= 2:
                        </span></h4><div class="field">
      <p>Chooses the type of Resource Selector.</p>
    <table class="valuetable"><tr><th>EVENT2_TYPE</th><th>Meaning</th></tr><tr><td class="bitfield">0b0</td><td><p>A single Resource Selector.</p>
<p>TRCEVENTCTL0R.EVENT2.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event.</p></td></tr><tr><td class="bitfield">0b1</td><td><p>A Boolean-combined pair of Resource Selectors.</p>
<p>TRCEVENTCTL0R.EVENT2.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT2.SEL[4] is <span class="arm-defined-word">RES0</span>.</p></td></tr></table><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-23_23-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-22_21">Bits [22:21]</h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-20_16-1">EVENT2_SEL, bits [20:16]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000 and UInt(TRCIDR0.NUMEVENT) &gt;= 2:
                        </span></h4><div class="field">
      <p>Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT2.TYPE controls whether TRCEVENTCTL0R.EVENT2.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.</p>
    <p>If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>Selecting Resource Selector pair 0 using this field is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>When any of the selected resource events occurs and <a href="ext-trceventctl1r.html">TRCEVENTCTL1R</a>.INSTEN[2] == 1, then Event element 2 is generated in the instruction trace element stream.</p><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-20_16-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-15_15-1">EVENT1_TYPE, bit [15]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000 and UInt(TRCIDR0.NUMEVENT) &gt;= 1:
                        </span></h4><div class="field">
      <p>Chooses the type of Resource Selector.</p>
    <table class="valuetable"><tr><th>EVENT1_TYPE</th><th>Meaning</th></tr><tr><td class="bitfield">0b0</td><td><p>A single Resource Selector.</p>
<p>TRCEVENTCTL0R.EVENT1.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event.</p></td></tr><tr><td class="bitfield">0b1</td><td><p>A Boolean-combined pair of Resource Selectors.</p>
<p>TRCEVENTCTL0R.EVENT1.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT1.SEL[4] is <span class="arm-defined-word">RES0</span>.</p></td></tr></table><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-15_15-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-14_13">Bits [14:13]</h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-12_8-1">EVENT1_SEL, bits [12:8]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000 and UInt(TRCIDR0.NUMEVENT) &gt;= 1:
                        </span></h4><div class="field">
      <p>Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT1.TYPE controls whether TRCEVENTCTL0R.EVENT1.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.</p>
    <p>If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>Selecting Resource Selector pair 0 using this field is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>When any of the selected resource events occurs and <a href="ext-trceventctl1r.html">TRCEVENTCTL1R</a>.INSTEN[1] == 1, then Event element 1 is generated in the instruction trace element stream.</p><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-12_8-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-7_7-1">EVENT0_TYPE, bit [7]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000:
                        </span></h4><div class="field">
      <p>Chooses the type of Resource Selector.</p>
    <table class="valuetable"><tr><th>EVENT0_TYPE</th><th>Meaning</th></tr><tr><td class="bitfield">0b0</td><td><p>A single Resource Selector.</p>
<p>TRCEVENTCTL0R.EVENT0.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event.</p></td></tr><tr><td class="bitfield">0b1</td><td><p>A Boolean-combined pair of Resource Selectors.</p>
<p>TRCEVENTCTL0R.EVENT0.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT0.SEL[4] is <span class="arm-defined-word">RES0</span>.</p></td></tr></table><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-7_7-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-6_5">Bits [6:5]</h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-4_0-1">EVENT0_SEL, bits [4:0]<span class="condition"><br/>When TRCIDR4.NUMRSPAIR != 0b0000:
                        </span></h4><div class="field">
      <p>Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT0.TYPE controls whether TRCEVENTCTL0R.EVENT0.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.</p>
    <p>If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>Selecting Resource Selector pair 0 using this field is <span class="arm-defined-word">UNPREDICTABLE</span>, and the resource event might fire or might not fire when the resources are not in the Paused state.</p>
<p>When any of the selected resource events occurs and <a href="ext-trceventctl1r.html">TRCEVENTCTL1R</a>.INSTEN[0] == 1, then Event element 0 is generated in the instruction trace element stream.</p><p>The reset behavior of this field is:</p><ul><li>On a Trace unit reset, 
      this field resets
       to an architecturally <span class="arm-defined-word">UNKNOWN</span> value.</li></ul></div><h4 id="fieldset_0-4_0-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h2>Accessing TRCEVENTCTL0R</h2>
        <p>Must be programmed if implemented.</p>

      
        <p>Writes are <span class="arm-defined-word">CONSTRAINED UNPREDICTABLE</span> if the trace unit is not in the Idle state.</p>
      <h4>TRCEVENTCTL0R can be accessed through the external debug interface:</h4><table class="info"><tr><th>Component</th><th>Offset</th><th>Instance</th></tr><tr><td>ETE</td><td><span class="hexnumber">0x020</span></td><td>TRCEVENTCTL0R</td></tr></table><p>This interface is accessible as follows:</p><ul><li>When OSLockStatus(), or !AllowExternalTraceAccess() or !IsTraceCorePowered(), accesses to this register generate an error response.
          </li><li>Otherwise, accesses to this register are <span class="access_level">RW</span>.
          </li></ul><hr class="bottom_line"/><table style="margin: 0 auto;"><tr><td><div class="topbar"><a href="AArch32-regindex.html">AArch32 Registers</a></div></td><td><div class="topbar"><a href="AArch64-regindex.html">AArch64 Registers</a></div></td><td><div class="topbar"><a href="AArch32-sysindex.html">AArch32 Instructions</a></div></td><td><div class="topbar"><a href="AArch64-sysindex.html">AArch64 Instructions</a></div></td><td><div class="topbar"><a href="enc_index.html">Index by Encoding</a></div></td><td><div class="topbar"><a href="ext_alpha_index.html">External Registers</a></div></td><td><div class="topbar"><a href="ext_enc_index.html">External Registers by Offset</a></div></td><td><div class="topbar"><a href="func_index.html">Registers by Functional Group</a></div></td><td><div class="topbar"><a href="notice.html">Proprietary Notice</a></div></td></tr></table><p class="versions">30/03/2023 19:07; 997dd0cf3258cacf72aa7cf7a885f19a4758c3af</p><p class="copyconf">Copyright © 2010-2023 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.</p></body>
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